Julian Lohuis
Compiler-Generated Hint Instructions for Reconfigurable CPUs

Abstract
This thesis explores the implementation of compiler-generated hint instructions for fine-grained reconfigurable CPUs, specifically within the context of a RISC-V CPU implemented on an FPGA by the Computer Engineering Group of the University of Osnabrück. Reconfigurable CPUs offer a dynamic alternative to traditional CPUs by allowing their hardware configuration to be modified at a granular level to optimise performance for specific tasks. This work extends the Clang and LLVM compiler infrastructure to support new pragma directives that enable programmers to embed reconfiguration hints directly into their source code. These directives allow the compiler to make informed decisions about when and how to reconfigure the CPU, taking into account the temporal cost of reconfiguration against the potential runtime speed-up. This implementation demonstrates significant performance improvements in applications running on reconfigurable hardware and provides a robust foundation for integrating compiler support for fine-grained reconfigurable CPUs.